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Recent experimental advances have made it possible to implement logical multiqubit transversal gates on surface codes in a multitude of platforms. A transversal controlled- (t) gate on two surface codes introduces correlated errors across the code blocks and thus requires modified decoding compared to established methods of decoding surface-code quantum memory (SCQM) or lattice-surgery operations. In this work, we examine and benchmark the performance of three different decoding strategies for the t for scalable fault-tolerant quantum computation. In particular, we present a low-complexity decoder based on minimum-weight perfect matching (MWPM) that achieves the same threshold as the SCQM MWPM decoder. We extend our analysis with a study of tailored decoding of a transversal-teleportation circuit, along with a comparison between the performance of lattice-surgery and transversal operations under Pauli- and erasure-noise models. Our investigation builds toward systematic estimation of the cost of implementing large-scale quantum algorithms based on transversal gates in the surface code. Published by the American Physical Society2025 

Quantum states decohere through interaction with the environment. Quantum error correction can preserve coherence through active feedback wherein quantum information is encoded into a logical state with a high degree of symmetry. Perturbations are detected by measuring the symmetries of the state and corrected by applying gates based on these measurements. To measure the symmetries without perturbing the data, ancillary quantum states are required. Shor error correction uses a separate quantum state for the measurement of each symmetry. Steane error correction maps the perturbations onto a logical ancilla qubit, which is then measured to check several symmetries simultaneously. We experimentally compare Shor and Steane correction of bit flip errors using the Bacon-Shor code implemented in a chain of 23 trapped atomic ions. We find that the Steane method produces fewer errors after a single round of error correction and less disturbance to the data qubits without error correction. 

Lookup-table decoding is fast and distance preserving, making it attractive for near-term quantum computer architectures with small-distance quantum error-correcting codes. In this work, we develop several optimization tools that can potentially reduce the space and time overhead required for flag fault-tolerant quantum error correction (FTQEC) with lookup-table decoding on Calderbank-Shor-Steane (CSS) codes. Our techniques include the compact lookup-table construction, the meet-in-the-middle technique, the adaptive time decoding for flag FTQEC, the classical processing technique for flag information, and the separate $X$- and $Z$-counting technique. We evaluate the performance of our tools using numerical simulation of hexagonal color codes of distances 3, 5, 7, and 9 under circuit-level noise. Combining all tools can result in an increase of more than an order of magnitude in the pseudothreshold for the hexagonal color code of distance 9, from $(1.34\pm 0.01)\times {10}^{-4}$to $(1.43\pm 0.07)\times {10}^{-3}$. Published by the American Physical Society2024 

Instruction scheduling is a key compiler optimization in quantum computing, just as it is for classical computing. Current schedulers optimize for data parallelism by allowing simultaneous execution of instructions, as long as their qubits do not overlap. However, on many quantum hardware platforms, instructions on overlapping qubits can be executed simultaneously through global interactions. For example, while fan-out in traditional quantum circuits can only be implemented sequentially when viewed at the logical level, global interactions at the physical level allow fan-out to be achieved in one step. We leverage this simultaneous fan-out primitive to optimize circuit synthesis for NISQ (Noisy Intermediate-Scale Quantum) workloads. In addition, we introduce novel quantum memory architectures based on fan-out.Our work also addresses hardware implementation of the fan-out primitive. We perform realistic simulations for trapped ion quantum computers. We also demonstrate experimental proof-of-concept of fan-out with superconducting qubits. We perform depth (runtime) and fidelity estimation for NISQ application circuits and quantum memory architectures under realistic noise models. Our simulations indicate promising results with an asymptotic advantage in runtime, as well as 7–24% reduction in error.